File:ADC voltage resolution mid-tread2.svg
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Description |
Frequency response of a series RLC circuit. |
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Source |
ADC voltage resolution. Mid-tread coding symmetrically spaced |
Date |
16th May 2010 |
Author | |
Permission (Reusing this file) |
See below.
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Licensing[edit]
| This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 License. Attribution: Courtesy Spinningspark at Wikipedia |
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 03:53, 7 January 2024 | 1,001 × 805 (63 KB) | Minorax (talk | contribs) | fix // Editing SVG source code using c:User:Rillke/SVGedit.js | |
15:31, 16 May 2010 | 1,001 × 805 (64 KB) | Spinningspark (talk | contribs) | Correct x-axis annotation | ||
14:17, 16 May 2010 | 1,001 × 805 (53 KB) | Spinningspark (talk | contribs) | {{Information |Description=Frequency response of a series RLC circuit. |Source=ADC voltage resolution. Mid-tread coding symetrically spaced |Date=16th May 2010 |Author=~~~ |other_versions= }} == Licensing == {{cc-by-sa-3.0|Courtesy Spinningspark at Wik |
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